by Tim » Wed Jan 23, 2008 7:50 am
by Tim
Wed Jan 23, 2008 7:50 am
Hi
These are increasingly being used for speeding up mathematical calculations, a modern take on the maths co-processor. Very interesting to keep an eye on this area. I saw a paper recently where a standard CPU running at 1 GHz could do a ZMP calculation fast enough for real time control of a research robot.I haven't got the link to hand, but it suggests that a GPU would perhaps be overkill for a first attempt at on-line RN-1 zmp control. Although maybe you have something else in mind? They typically come as a PCI or other plug in computer card so they'd be too big to mount on the RN-1 directly. Sony PS3 with IBM cell processor with 8 cores is another interesting possibilty but similar constraints apply.
I suppose a large fast FPGA with at least one microprocessor core and floating point unit might just do the trick if you have enough gates up your sleeve, or otherwise the classic DSP and FPGA combo... There are usually some dev boards available along these lines but they're not trivial to learn to use. I-bot and others from the changing the code in 3024 thread will know better how much capacity is left over in the existing controller when you write your own firmware. In fact I think I-bot has already done a picoblaze uP on a Xilinx FPGA (spartan?) . Any thoughts I-bot?
Tim
Hi
These are increasingly being used for speeding up mathematical calculations, a modern take on the maths co-processor. Very interesting to keep an eye on this area. I saw a paper recently where a standard CPU running at 1 GHz could do a ZMP calculation fast enough for real time control of a research robot.I haven't got the link to hand, but it suggests that a GPU would perhaps be overkill for a first attempt at on-line RN-1 zmp control. Although maybe you have something else in mind? They typically come as a PCI or other plug in computer card so they'd be too big to mount on the RN-1 directly. Sony PS3 with IBM cell processor with 8 cores is another interesting possibilty but similar constraints apply.
I suppose a large fast FPGA with at least one microprocessor core and floating point unit might just do the trick if you have enough gates up your sleeve, or otherwise the classic DSP and FPGA combo... There are usually some dev boards available along these lines but they're not trivial to learn to use. I-bot and others from the changing the code in 3024 thread will know better how much capacity is left over in the existing controller when you write your own firmware. In fact I think I-bot has already done a picoblaze uP on a Xilinx FPGA (spartan?) . Any thoughts I-bot?
Tim